A General Predictive Performance Model for Wavefront Algorithms on Clusters of SMPs

We have recently been studying the performance of wavefront algorithms implemented using message passing on 2dimensional logical processor arrays [1,2]. Wavefront algorithms are ubiquitous in parallel computing, since they represent a means of enabling parallelism in computations that contain recurrences. Our particular interest in wavefront algorithms derives from their use in discrete ordinates neutral particle transport [3] computations, but other important uses are well known [4-7]. The basis of wavefront parallelism is the data dependence graph shown in Figure 1, in which the nodes may represent either physical grid points or logical processors. In the latter case, a computation progresses as a wavefront and "scans" through a processor grid with pairs of processors sending and receiving boundary data required in order to update a portion of the physical mesh. Those processors within each wavefront, i.e., those on a diagonal, are algorithmically independent. Intuitively, then, the nominal benefit of wavefront parallelism is related to the (continuously-changing) length of a diagonal. However, additional concurrency can be achieved by "blocking" the computation, resulting in more wavefront “sweeps” using smaller computational subgrids. This reduces processor idle time that accumulates as processors await their turn to compute, but requires that processors communicate more often. This tradeoff between processor utilization and communication requirements is characteristics of wavefront algorithms. An important task of performance models such as those described in [1,2] and the one proposed in this paper is to capture this tradeoff and the influence of the blocking parameters on the overall runtime of the application. Figure 1. Schematic of wavefront parallelism